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LASCAS is the international symposium and flagship event of the IEEE Circuits and Systems Society in Latin America.
13th Latin American Symposium on Circuits
and Systems
March 1 – 4, 2022
LASCAS 2022 goes Hybrid and moves to Santiago, Chile
In face of the current situation posed by COVID 19 the Organizing Committee is turning LASCAS 2022 into a hybrid event for you to choose how you want to participate.
More information coming soon!
Organizers


Sponsors

About
LASCAS is the international symposium and flagship event of the IEEE Circuits and Systems Society in Latin America. The conference provides a high-quality exchange and networking forum for researchers, professionals, and students, gathering an international audience with experts from all over the world. This event is a space where the CAS community can present new concepts and innovative approaches, learn about new trends and solutions, and receive feedback from specialists in diverse fields.
LASCAS thirteen edition will take place in Puerto Varas, Chile. Puerto varas is a city in Chile’s Lake District about 1,000km south from Santiago (1:45hr by flight). It sits on the southwest banks of the expansive Lake Llanquihue, which offers commanding views of snow-capped Osorno Volcano and Calbuco Volcano, both still active. Cerro Tronador an extinct stratovolcano is also clearly visible from the lakefront. The city also known as «the city of roses» is famous for its German traditions and its natural environment. It enjoys a scenic location close to mountains, lakes, forest, and national parks. Puerto Varas is the southernmost of a string of towns on the western shore of Llanquihue Lake that includes Frutillar, Llanquihue and Puerto Octay.
About
LASCAS is the international symposium and flagship event of the IEEE Circuits and Systems Society in Latin America. The conference provides a high-quality exchange and networking forum for researchers, professionals, and students, gathering an international audience with experts from all over the world. This event is a space where the CAS community can present new concepts and innovative approaches, learn about new trends and solutions, and receive feedback from specialists in diverse fields.
In face of the current situation posed by COVID 19 the Organizing Committee is turning LASCAS 2022 into a hybrid event and moved to Santiago for you to choose how you want to participate.
LASCAS thirteen edition will now take place in Santiago, Chile’s capital, and largest city. Santiago sits in a valley surrounded by the snow-capped Andes and the Chilean Coast Range captivating with its assorted panoramas and its versatility. In the city we find entertaining neighborhoods with vibrant nightlife, restaurants, designer shops and art galleries.
Plaza de Armas, is the grand heart of the city’s old colonial core and is home to 2 neoclassical landmarks: the 1808 Palacio de la Real Audiencia, housing the National History Museum, and the 18th-century Metropolitan Cathedral.
Large parks such as Parque Metropolitano, the capital city’s largest urban natural area is located in Cerro San Cristobal where we find the zoo, the Inmaculada Concepción Sanctuary wat the peak, the funicular railway and cable car to enjoy a panoramic view of the city, looking out from above.
Since its location is in a valley, it’s surrounded by mountains that offer attractive panoramas like visiting the ski resorts in winter, hiking, horseback riding and much more. Also because of its central location, Santiago allows you to be at the beach in only a few hours, so in one day you can see Valparaíso, Viña del Mar, and Isla Negra among other locations.









ORGANIZATION
General Chairs
Yann Deval, IMS, University of Bordeaux, France
Victor Grimblatt, Synopsys, Chile
Program Chairs
Malgorzata Chrzanowska-Jeske, Portland State University, USA
Angel Abusleme, Pontificia Universidad Católica, Chile
Special Sessions Chairs
Ioannis Vourkas, UTFSM, Chile
Georgios Ch. Sirakoulis, Democritus University of Thrace, Greece
Local Organization Chairs
Carlos Muñoz, UFRO, Chile
Tutorial Chairs
Gonzalo Carvajal, UTFSM, Chile
Ronald Valenzuela, Synopsys, Chile
WICAS Chairs
Paola Yang, Synopsys, Chile
Renata Mella, Synopsys, Chile
Industry Liason
North America: Vojin Oklobdzija, UC Davis, USA
Europe: Guillaume Ferré, IMS, University of Bordeaux, France
For Authors
Important: Organizers are continuously monitoring the evolution of the pandemic to make timely decisions.
Authors who have problems traveling or do not feel comfortable traveling will have the guarantee to present their papers by videoconference.
TOPICS
The symposium will cover technical novelties and tutorial overviews on circuits and sytems topics including but not limited to:
- Analog and Digital Circuits
- Mixed-Mode Circuits
- Biomedical Electronics
- Communication/RF Circuits
- Wireless Sensor Networks
- Nanoelectronics
- Electronic Design Automation
- VLSI Systems and Applications
- FPGA Design and Applications
- Circuit Testing
- Fault Tolerant Circuits
- Circuits and Systems for Space and Nuclear Applications
PAPER SUBMISSION
Final Deadline Extended
- Special Session Proposal:
September 15, 2021
- Paper Submision:
September 26, 2021
- Tutorial Submission:
October 1, 2021
- Notification of acceptance:
November 19, 2021
- Camera-ready:
December 10, 2021
All papers must be uploaded using EasyChair. Please log in to EasyChair first and then click EasyChair LASCAS2022. Papers should be presented following the IEEE Proceedings format. Papers must not exceed four pages in length. Ignore the header, and please do not number your pages. Bios and photos are not included in Conference Proceedings, thus please do not include them either. Accepted papers will be submitted for inclusion into IEEE Xplore subject to meeting IEEE Xplore’s scope and quality requirements. Best papers will be invited to a special edition of the IEEE Transactions on Circuits and Systems I (TCAS-⁠I).
Before Creating a PDF
- Add the copyright notice to the bottom of the first page of your source document. If necessary,
- contact Victor Grimblatt at victor.grimblatt@synopsys.com for the appropriate copyright notice.
- Proofread your source document thoroughly to confirm that it will require no revision.
Creating your PDF eXpress Account
Log in to the IEEE PDF eXpress TM site

First-time users should register by clicking Create an Account

Use 53948X for the Conference ID
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Conference
Organization
LASCAS 2022 gathers the following group of experts in the organization committee:
ORGANIZATION COMMITTEE
General Chairs

Yann Deval, IMS, University of Bordeaux, France

Victor Grimblatt, Synopsys, Chile
Program Chairs

Malgorzata Chrzanowska-Jeske, Portland State University, USA

Angel Abusleme, Pontificia Universidad Católica, Chile
Special Sessions Chairs

Ioannis Vourkas, UTFSM, Chile

Georgios Ch. Sirakoulis, Democritus University of Thrace, Greece
Program Overview
Detailed Program Schedule download here.
CL time (GMT-3) | Tuesday - March 1, 2022 | ||
---|---|---|---|
9:15 – 10:45 | Tutorial 1 AM: | Tutorial 2 AM: | Tutorial 3 AM: |
Trends and Challenges in EDA | Circuits for reversible computing | Improving integrated circuit reliability by combining tests to ionizing radiation and electromagnetic compatibility | |
10:45 - 11:00 | Coffee break | ||
11:00 - 12:30 | Tutorial 1 AM: continue | Tutorial 2 AM: continue | Tutorial 3 AM: continue |
12:30 - 14:00 | Lunch | ||
14:00 - 15:30 | Tutorial 4 PM: | Tutorial 5 PM: | |
Power Analysis in VLSI circuit design: An Overview | Battery Life Extension Techniques for Energy Harvesting-Based IoT Device | ||
15:30 - 15:45 | Coffee break | ||
15:45 - 17:15 | Tutorial 4 PM: continue | Tutorial 5 PM: continue | |
19:00 | Welcome Reception |
CL time (GMT-3) | Wednesday - March 2, 2022 | ||
---|---|---|---|
8:15 - 8:45 | Opening Session | ||
8:45 – 10:00 | Keynote | ||
David Atienza: Sustainable Cloud Computing Systems for a Digitalized World | |||
10:00 - 10:15 | Coffee break | ||
10:15 - 11:35 | Sessions W1 A. (4) | Sessions W1 B. (4) | |
Track 3: Communication Systems 31, 61, 44, 68 | SS3 Approximate Computing for Energy-Efficient VLSI Circuits and Systems 107, 106, 104, 108 | ||
11:40 - 13:00 | Session W 2 A (4) | Sessions W2.B. (4) | |
Track 10: Nanoelectronics 1 12, 85, 56, 20 | Track 5: Fault Tolerant 63, 25, 41, 57 | ||
13:00 - 14:40 | Lunch | ||
14:40 - 15:50 | Keynote | ||
Monica Retamal: Women's Digital Empowerment | |||
15:50 - 17:30 | WICAS EVENT: Invited paper Sanjida Moury, "The Next-Generation Power Electronics Interface for Green Applications" Panel "Renewable Energy and Climate Change", Moderators: Renata Mella, Paola Yang, Panelists: Sanjida Moury, Claudia Rahmann, third TBD |
CL time (GMT-3) | Thursday - March 3, 2022 | ||
---|---|---|---|
8:45 - 10:00 | Keynote | ||
Boris Murman: Mixed-Signal Circuit Design for the Data-Driven World | |||
10:00 - 10:15 | Coffee break | ||
10:15 - 11:35 | Sessions TH1 A (4) | Sessions TH1 .B (4) Track 4: | |
Track 10: Nanoelectronics II 37, 53, 8, 71 | Design Automation I 14, 26, 36, 46 | Iberchip | |
11:40 - 13:00 | Session TH2 A (4) | Sessions TH 2 B | |
Track 7: Sensors 8, 5, 43, 64 | Track 2: Digital I 54, 58, 70, 99, 11 | ||
13:00 - 14:40 | Lunch | ||
14:40 - 15:50 | Keynote | ||
Pierre-Emmanuel Gaillardon: Under the Hood of OpenFPGA | |||
15:50 - 17:30 | Sessions TH3 A (5) | Sessions TH3 B (5) | Sessions TH3 C (5) SS2 |
Track 1: Analog 1 6, 22, 50, 86, 88 | Track 2: Digital II 55. 39. 60 , 23 | Application of Technology for Agrifood 109, 66, 101, 24, 82 | |
17:30 - 17:45 | Coffe break | ||
17:45 - 19:15 | Pannel: "Heterogenious 3D Integration" moderator/organizer: Malgorzata Chrzanowska-Jeske. Panelists: Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Maciej Ogorzalek, Ricardo Reis | ||
20:00 | Gala Dinner |
CL time (GMT-3) | Friday - March 4, 2022 | ||
---|---|---|---|
8:45 - 10:00 | Keynote | ||
Sorin Cotofana: Spin Wave Based Computing: Promises and Hurdles on the Road | |||
10:00 - 10:15 | Coffee break | ||
10:15 - 11:35 | Sessions F1 A (5) | Sessions F1 B. (4) | |
Track 1: Analog 2 9, 32, 51, 65, 89 | Track 9: Applied Circuits & Systems 38, 49, 77, 30 | Iberchip | |
11:40 - 13:00 | Starts at 12:00 Session F 2 A (3) |
Sessions F2 B (3) | |
Track 4: Design Automation II 27, 40, 75 | SS1 Development of high efficiency & HF circuits for power electronics converters 33, 103, 102 | ||
13:00 - 14:40 | Lunch | ||
14:40 - 15:50 | Embedded Tutorial | ||
Maciej Ogorzalek: Towards New Architectures for 3D Integration | |||
15:50 - 16:50 | Closing Ceremony |
PROGRAM
Overview of the Schedule
(LASCAS, IBERCHIP, PRIME LA)
COMING SOON
TECHNICAL PROGRAM
COMMITTEE (TPC)
COMING SOON
TUTORIALS
COMING SOON
Keynotes
Boris Murmann |
Mixed-Signal Circuit Design for the Data-Driven World ABSTRACT: Boris Murmann is a Professor of Electrical Engineering at Stanford University. He joined Stanford in 2004 after completing his Ph.D. degree in electrical engineering at the University of California, Berkeley in 2003. From 1994 to 1997, he was with Neutron Microelectronics, Germany, where he developed low-power and smart-power ASICs in automotive CMOS technology. Since 2004, he has worked as a consultant with numerous Silicon Valley companies. Dr. Murmann’s research interests are in mixed-signal integrated circuit design, with special emphasis on sensor interfaces, data converters, high-speed communication and machine learning. In 2008, he was a co-recipient of the Best Student Paper Award at the VLSI Circuits Symposium and a recipient of the Best Invited Paper Award at the IEEE Custom Integrated Circuits Conference (CICC). He received the 2009 Agilent Early Career Professor Award, the 2012 Friedrich Wilhelm Bessel Research Award by the Alexander von Humboldt Foundation, and the 2021 SIA-SRC University Researcher Award for lifetime research contributions to the U.S. semiconductor industry. He has served as an Associate Editor of the IEEE Journal of Solid-State Circuits, an AdCom member and Distinguished Lecturer of the IEEE Solid-State Circuits Society (SSCS), the Data Converter Subcommittee Chair and Technical Program Chair of the IEEE International Solid-State Circuits Conference (ISSCC), as well as the Technical Program Co-Chair of the tinyML Research Symposium. He currently chairs the IEEE SSCS future directions committee (SSCD). He is a Fellow of the IEEE. |
Boris Murmann
Professor of Electrical Engineering at Stanford University
Prof. David Atienza EPFL, Switzerland |
Sustainable Cloud Computing Systems for a Digitalized World ABSTRACT: David Atienza is a Full Professor of Electrical and Computer Engineering and heads the Embedded Systems Laboratory (ESL) at EPFL. He received his MSc and Ph.D. degrees in Computer Science and Engineering from UCM and IMEC. His research interests focus on system-level design methodologies for energy-efficient computing systems, particularly multi-processor system-on-chip architectures (MPSoC) for servers and next-generation edge AI architectures. He is a co-author of more than 350 publications, 14 patents, and has received several best paper awards in top conferences in these fields. Dr. Atienza received, among other recognitions, the ICCAD 2020 10-Year Retrospective Most Influential Paper Award, the DAC Under-40 Innovators Award in 2018, the IEEE CEDA Early Career Award in 2013, and the ACM SIGDA Outstanding New Faculty Award in 2012. He is an IEEE Fellow, an ACM Distinguished Member, and was the President (2018-2019) of IEEE CEDA. |
Prof. David Atienza
Embedded Systems Laboratory (ESL), EPFL, Switzerland.
Mónica Retamal Fuentes Santiago, Chile |
Women's Digital Empowerment ABSTRACT: In this presentation the Executive Director of Kodea Foundation will address on how technology contributes to increase women's autonomy, understood as "having the capacity and concrete conditions to freely make decisions that affect their lives" in all dimesions - economic, political, social and cultural - and consequently, to review how digitization and technological irruption have opened windows of opportunity in different dimensions that facilitate new spaces for women: multiplatform campaigns that raise gender claims officializing the fourth wave of feminism; and at the same time that enables economic possibilities that open up in labor world, through training in digital skills and entrepreneurship. Mónica Retamal Fuentes is a Social Entrepreneur since 2015 and technological entrepreneur since 1999. Currently, she is the Executive Director of Kodea Foundation, a social enterprise whose mission is to digitally empower the inhabitants of Chile, promoting a more inclusive technological development and the democratization of scientific-digital knowledge, to digitally empower its beneficiaries and bring them closer to the opportunities that the digital age offers. She has been working intensively to promote digital job retraining, technological literacy and a school education that incorporates Computer Science in the classroom. With her vision that Chile and Latin America become aware of the importance of training talents for the digital world in a massive way and democratizing access to higher-level digital skills, Mónica brought to Chile the largest digital education campaign in the world La Hora of the Code (Code.org) and with Kodea Foundation she has developed several initiatives oriented to education, such as the Los Creadores school digital talent award, the training in computational thinking of 6000 teachers, EduK, IdeoDigital; as well as; Women Programmers, Digital Talent for Chile and Connected Entrepreneurs and the citizen platform Nuestra Voz. Her programs have allowed more than 1.5 million people to develop skills for the 21st century and also reach their families and society. Mónica Retamal received in 2015 the Chiletec Women in Technology award, in 2016 the Service Export Award (Sofofa and the Ministry of Finance). She was awarded as part of the 100 Women Leaders of Chile by the newspaper El Mercurio. In 2021 she was awarded the International Woman in Tech Lifetime Achievement Award. She was an ambassador for the Chile Brand and together with the Kodea's team has received JK Visionaries award in 2020. The JK Visionaries award is the highest honor bestowed by the Inter-American Development Bank to recognize extraordinary organizations that are working in innovative and effective ways to improve lives in Latin America and the Caribbean. |
Mónica Retamal Fuentes
Executive Director of Kodea Foundation
Santiago, Chile.
Pierre-Emmanuel Gaillardon, PhD Salt Lake City, UT, USA |
Under the Hood of OpenFPGA ABSTRACT: Pierre-Emmanuel Gaillardon (S’10–M’11–SM’16) is an Associate Professor and the Associate Chair for Academics and Strategic Initiatives in the Electrical and Computer Engineering (ECE) department and an adjunct Associate Professor in the School of Computing at The University of Utah, Salt Lake City, UT, where he leads the Laboratory for NanoIntegrated Systems (LNIS). He holds an Electrical Engineer degree from CPE-Lyon, France (2008), a M.Sc. degree in Electrical Engineering from INSA Lyon, France (2008) and a Ph.D. degree in Electrical Engineering from CEA-LETI, Grenoble, France and the University of Lyon, France (2011). Prior to joining the University of Utah, he was a research associate at the Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland within the Laboratory of Integrated Systems (Prof. De Micheli) and a visiting research associate at Stanford University, Palo Alto, CA, USA. Previously, he was research assistant at CEA-LETI, Grenoble, France. Prof. Gaillardon is recipient of the C-Innov 2011 best thesis award, the Nanoarch 2012 best paper award, the BSF 2017 Prof. Pazy Memorial Research Award, the 2017 NSF CAREER award, the 2018 IEEE CEDA Pederson Award, the 2018 ChemE Education William H. Corcoran best paper award, the 2019 DARPA Young Faculty Award, the 2019 IEEE CEDA Ernest S. Kuh Early Career Award and the 2020 ACM SIGDA Outstanding New Faculty Award. He has been serving as TPC member for many conferences, including DATE, DAC, ICCAD, Nanoarch, etc.. He is an associate editor of IEEE TNANO and a reviewer for several journals and funding agencies. He served as Topic co-chair "Emerging Technologies for Future Memories" for DATE'17-19. He is a senior member of the IEEE. The research activities and interests of Prof. Gaillardon are currently focused on the development of novel computing systems exploiting emerging device technologies and novel EDA techniques. BIO/Picture: Available at https://www.pegaillardon.com/people |
Pierre-Emmanuel Gaillardon, PhD
pierre-emmanuel.gaillardon@utah.edu
Department of Electrical and Computer Engineering – University of Utah
Salt Lake City, UT, USA.
Sorin Cotofana Delft University of Technology |
Spin Wave Based Computing: Promises and Hurdles on the Road ABSTRACT: Sorin Cotofana received the MSc degree in Computer Science from the "Politechnica" University of Bucharest, Romania, and the PhD degree in Electrical Engineering from Delft University of Technology, The Netherlands. He is currently with the Electrical Engineering, Mathematics and Computer Science Faculty, Delft University of Technology, Delft, the Netherlands. His current research is focused on: (i) the design and implementation of dependable/reliable systems out of unpredictable/unreliable components; (ii) ageing assessment/prediction and lifetime reliability aware resource management; and (iii) unconventional computation paradigms and computation with emerging nano-devices. He (co-)authored more than 250 papers in peer-reviewed international journal and conferences, and received 12 international conferences best paper awards, e.g., 2012 IEEE Conference on Nanotechnology, 2012 ACM/IEEE International Symposium on Nanoscale Architectures, 2005 IEEE Conference on Nanotechnology, 2001 International Conference on Computer Design. He served as Associate editor for IEEE Transactions on CAS I (2009-2011), IEEE Transactions on Nanotechnology (2008-2014), member of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems Senior Editorial Board (2016-2017), Steering Committee member for IEEE Transactions on Multi-Scale Computing Systems (2014-2018), Chair of the Giga-Nano IEEE CASS Technical Committee (2013-2015), and IEEE Nano Council CASS representative (2013-2014) and has been actively involved as reviewer, Technical Program Committee (TPC) member, and TPC (track) and general (co)-chair, in the organization of numerous international conferences. He is currently Editor in Chief for IEEE Transactions on Nanotechnology, Associate Editor for IEEE Transactions on Computers, CASS Distinguished Lecturer, and CAS BoG member. He is a Fellow IEEE member (Circuits and System Society (CASS) and Computer Society) and a HiPEAC member. |
Sorin Cotofana
S.D.Cotofana@TUDelft.nl
Delft University of Technology.
Maciej J. Ogorzalek Poland |
Towards New Architectures for 3D Integration ABSTRACT: Looking at many generations of chips offering different functionalities the “flat-world” assumptions and technologies used are omnipresent. Even more, the shapes of building blocks are predominantly rectangular with interconnect lines crossing at right angles. Such geometries bring many limitations. Some attempts were made to make so-called X-interconnects going along the diagonals of the rectangles looking for shortening the lengths of wires. Further developments in ICs introduced 3D architectures. Here the flat slices are being superimposed in a regular vertical construction - several specific techniques have been proposed, all based on principles of planar design - like constructing a building floor after floor. This kind of IC architectures are relatively easy to design and fabricate. Efficient technologies exist for their realisation. They are however far from being optimal! Building layered structures with limited variety of shapes introduces several very strong constraints. Power efficiency is limited, heat removal is difficult, wire length is not optimal, which results in timing problems and signal delays. Interconnect remains a major problem - so-called fan-out remains unsolved limitation. Looking at the solutions visible in living organisms one can immediately spot that there are no flat surfaces, no rectangles, connection and distribution systems in plants, organism tissues of animals and humans form complicated shapes and structures far from regular. Interconnects between eg. brain cells offer fan-out many levels superior to best ICs. With the latest technological developments we can now think about constructing chips with unusual architectures and new properties in some cases resembling the nature but also proposing new concepts. This presentation will give some insights into these new directions, new ideas, techniques, and technologies comparing them with latest "flat-world" achievements. Maciej J. Ogorzalek is Professor and Head of the Department of Information Technologies, Jagiellonian University Krakow, Poland. He held many visiting positions in Switzerland, US, Spain, Japan, Germany. Between 2006-2009 he held the Chair of Biosignals and Systems, Hong Kong Polytechnic University under the Distinguished Scholars Scheme. In 2019/2020 he was visiting professor at the Waseda University, Tokio, Japan and later at the Integrated Systems Laboratory at EPFL. Author or co-author of over 380 papers published in journals and conference proceedings and a book Chaos and Complexity in Nonlinear Electronic Circuits. He gave over 60 plenary and keynote lectures at major conferences world-wide. He served as Editor-in-Chief of the IEEE Circuits and Systems Magazine (2004-2007), member of the editorial boards of the IEEE Transactions on Circuits and Systems Part I, Proceedings of the IEEE, International Journal of Bifurcation and Chaos, International Journal of Circuit Theory and Applications also the NOLTA Journal IEICE Japan. Dr. Ogorzalek is IEEE Fellow (1997). He was IEEE 2008 Circuits and Systems Society President. He served as IEEE Division 1 Director, Member of the IEEE Board of Directors (2016-2017). He is Member of the Polish Academy of Sciences (PAN) and Member of the European Academy of Sciences (Academia Europaea). |
REGISTRATION
LASCAS 2022 registration site is open now!
Registration by Bank Transfer
If you wish to do a bank transfer, please complete this registration form and send to Jenna Yockim (jyockim@conferencecatalysts.com). Note: Payments made via bank transfer are non-refundable. Bank transfer payments will incur a $25 transaction fee.
IEEE CASS Member
$ 450
(early registration before January 31, 2022)
Full registration from 2/1/2022
$500
IEEE Member
$ 500
(early registration before January 31, 2022)
Full registration from 2/1/2022
$550
IEEE Non-Member
$ 600
(early registration before January 31, 2022)
Full registration from 2/1/2022
$650
Online
$ 200
Registration fee for the online conference is applicable to all attendees
(IEEE CASS Members, IEEE Members/Non-Members, IEEE CASS Students, IEEE Students and Students)
IEEE CASS Student
$ 200
(early registration before January 31, 2022)
Full registration from 2/1/2022
$250
IEEE Student
$ 250
(early registration before January 31, 2022)
Full registration from 2/1/2022
$300
Student
$ 300
(early registration before January 31, 2022)
Full registration from 2/1/2022
$350


About Puerto Varas
The 13th edition will take place in Puerto Varas, a city in Chile’s Lake District about 1,000km south from Santiago (1:45hr by flight). It sits on the southwest banks of the expansive Lake Llanquihue, which offers commanding views of snow-capped Osorno Volcano and Calbuco Volcano, both still active. The city also known as “the city of roses” is famous for its German traditions and a truly stunning natural setting. It enjoys a scenic location close to mountains, lakes, forests, and national parks. Puerto Varas is the southernmost of a string of towns on the western shore of the lake that includes Frutillar and its famous Teatro del Lago a magnificent lakeside concert hall which plays host to top international orchestras and artists.
The main access by plane is, the Comodoro Arturo Merino Benitez Airport in Santiago (SCL) with a connecting flight to El Tepual Airport. But depending on international connections you may arrive directly at El Tepual Airport.
Important COVID Information: Requirements for entering Chile refer to the following site https://www.chile.travel/en/traveltochileplan/.
VENUE
LASCAS 2022 will be held at the Enjoy Puerto Varas Hotel, located in Puerto Varas, Los Lagos Region.
Reservations: Reservations can be made following this link. Please consider that preferential rates listed are available until January 27th, 2022.
About Santiago
In face of the current situation posed by COVID 19 the Organizing Committee is turning LASCAS 2022 into a hybrid event and moved to Santiago for you to choose how you want to participate.
LASCAS thirteen edition will now take place in Santiago, Chile’s capital and largest city. Santiago sits in a valley surrounded by the snow-capped Andes and the Chilean Coast Range captivating with its assorted panoramas and its versatility. In the city we find entertaining neighborhoods with vibrant nightlife, restaurants, designer shops and art galleries.
Large parks such as Parque Metropolitano, the capital city’s largest urban natural area is located in Cerro San Cristobal where we find the zoo, the Santuario Inmaculada Concepción, the funicular railway and cable car to enjoy a panoramic view of the city, looking out from above.
Since its location is in a valley, it’s surrounded by mountains that offer attractive panoramas like visiting the ski resorts in winter and others and, at the same time Santiago also allows you to be at the beach in only a few hours, so in one day you can see Valparaíso, Viña del Mar and Isla Negra among other locations.
In the surroundings of Santiago, the most important wine regions of the country are found which are known as Ruta del Vino (the Wine Route), where you can visit the vineyards and taste different wine strains accompanied by Chilean cuisine.
The main access by plane is, the Comodoro Arturo Merino Benitez Airport in Santiago (SCL).
Important COVID Information: Requirements for entering Chile
refer to https://www.chile.travel/en/traveltochileplan/ .Travelers are required to have completed a vaccination program (2 doses), which must be validated at https://mevacuno.gob.cl/ entering Chile. The vaccination approval period procedure may take up to 30 calendar days.
VENUE
LASCAS 2022 will be held at the Novotel Santiago Las Condes (ex-Atton), located at Avenida Alonso de Cordova 5199, Las Condes, Santiago.
Reservations: Reservations can be made following this link. Please make sure to indicate that you are attending the LASCAS 2022 Conference.
CONTACT US
Victor Grimblatt, Synopsys Chile
victor.grimblatt@synopsys.com
Myriam Cavada, Synopsys Chile
cavada@synopsys.com